MPC8349E-mITXE Board
Table 13 describes the position of each jumper.
Table 13. Description of Jumper J22 Positions
Default
Position
Name
ON = Jumper Is On
Description
OFF = Jumper Is Off
A
B
C
LGPL0
LGPL1
LGPL3
ON (0)
ON (0)
ON (0)
000 local bus EEPROM (Default)
001 I 2 C EEPROM,PCI_CLK/PCI_SYNC_IN 25–44 MHz
010 I 2 C EEPROM,PCI_CLK/PCI_SYNC_IN 25–66.666 MHz
011 Hard-coded option, 66 MHz, 266 MHz, 400 MHz (PCI, CSB, CPU)
100 Hard-coded option, 33 MHz, 266 MHz, 400 MHz
101 Hard-coded option, 33 MHz, 133 MHz, 266 MHz
110 Hard-coded option, 33 MHz, 166 MHz, 333 MHz
111 Hard-coded option, 66 MHz, 266 MHz, 533 MHz
Hard-coded option is used in conjunction with JTAG debug
D
LGPL5
OFF (1)
OFF (1): Default
CLKIN: PCI_SYNC_OUT = 2:1 PCI_CLK_OUT[0:7] = OCCR (max CLKIN/2).
Use if 66 MHz CLKIN is used with 66 MHz PCI1 and 33 MHz PCI2.
ON (0):
CLKIN: PCI_SYNC_OUT = 1:1, PCI_CLK_OUT[0:7] = CLKIN. Use if the
PCI1 and PCI2 have the same frequency and the PCI frequency = CLKIN.
E
BOOT1
ON (0)
OFF (1):
MPC8349E fetches the reset vector from Flash 0 (U4).
ON (0): Default
MPC8349E fetches the reset vector from Flash 1 (U7).
F
PCI_M66EN
ON (0)
OFF (1):
M66EN signal is determined by the card plugged into the PCI slot (PCI 32-bit
slot and MiniPCI slot).
ON (0): Default
M66EN signal is hardwired to 0, which is hard coded to 33 MHz PCI
operation.
G
I2C-WP
ON (0)
OFF (1):
I 2 C EEPROM (U64) is write protected.
ON (0): Default
I 2 C EEPROM (U64) is not write protected.
H
F_WP
OFF (1)
OFF (1): Default
Flash (U4 and U7) are not write protected.
ON (0):
Flash (U4 and U7) are write protected.
MPC8349E-mITXE Reference Design Platform User’s Guide, Rev. 2
28
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
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